Search - vhdl code for uart

[VHDL-FPGA-Verilog] conv_code

Description: 用VHDL实现卷积码编码，该码为（2.1.3）型卷积码。-using VHDL Convolutional coding, the code (2.1.3)- Convolutional Codes.
Platform: | Size: 1024 | Author: 武汉 | Hits:

[Com Port] uart_VHDL

Description: uart的vhdl实现代码分模块设计和状态机设计不错的，用它没错-UART achieve the VHDL code modular design and state machine design good, the right to use it
Platform: | Size: 10240 | Author: 王平 | Hits:

[VHDL-FPGA-Verilog] u-uart

Description: 一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
Platform: | Size: 5120 | Author: 李文文 | Hits:

[VHDL-FPGA-Verilog] usingVHDLtoimplementUART

Description:
Platform: | Size: 317440 | Author: 邓旭 | Hits:

[VHDL-FPGA-Verilog] uart

Description: vhdl书写uart代码,经验证功能非常的全.-UART code written in VHDL, experience card features a very wide.
Platform: | Size: 405504 | Author: zjc | Hits:

Description: 本代码是用VHDL语言全面、系统地描述UART通信协议标准，通过对UART进行数据通信的实际运用，能够较全面地理解和掌握VHDL和UART协议。-The VHDL language code is a comprehensive, systematic description of UART communication protocol standards, through the UART to the practical application of data communications, to more fully understand and grasp the VHDL and the UART protocol.
Platform: | Size: 22528 | Author: fengxinya | Hits:

[VHDL-FPGA-Verilog] 8051-vhdl-code

Description:
Platform: | Size: 98304 | Author: 周华茂 | Hits:

[Com Port] uart

Description: 开源的串口通信程序，用vhdl 编写的，已通过测试，在DE2的开发板上能够运行。-Open source serial communication procedures, prepared by using VHDL, has been tested in the DE2 development board to run.
Platform: | Size: 2048 | Author: caijl88 | Hits:

[VHDL-FPGA-Verilog] uart

Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200.
Platform: | Size: 5120 | Author: 陈想 | Hits:

[VHDL-FPGA-Verilog] uart

Description: VHDL编写的异步通信串行口设计用Quartus工具编译-VHDL prepared the design of serial asynchronous communication tool used Quartus compiler
Platform: | Size: 212992 | Author: 朱兆斌 | Hits:

[SCM] uart

Description: 单片机串口通信原理，对于初学者来说是很好的资料。-Single-chip serial communication principle is very good for beginners information.
Platform: | Size: 56320 | Author: liujuan | Hits:

[VHDL-FPGA-Verilog] uart(Verilog)

Description: uart异步串口通信协议的源代码，用vhdl语言编写，并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
Platform: | Size: 10240 | Author: 阿军 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 串口实验，很好用，我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
Platform: | Size: 338944 | Author: 韩思贤 | Hits:

[Com Port] UART

Description: 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
Platform: | Size: 9216 | Author: 李佳 | Hits:

[VHDL-FPGA-Verilog] uart

Description: Verilog编写的UART程序源代码。测试成功。支持字符串发送-UART prepared Verilog source code. Successful test. Support string sent
Platform: | Size: 1548288 | Author: 卢山 | Hits:

[VHDL-FPGA-Verilog] URAT_VHDL_CODE

Description: altera公司的fpga源代码，用VHDL编写的uart程序。-altera' s fpga source code, uart program written using VHDL.
Platform: | Size: 32768 | Author: 张东 | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart - universal asynchronous receicer and transmitter source code using VHDL
Platform: | Size: 1930240 | Author: nagarjuna reddy | Hits:

[Other] uart

Description: UART串口的VHDL源程序，希望对大家有用-UART serial port of the VHDL source code, we want to be useful
Platform: | Size: 17408 | Author: 贾明 | Hits:

[VHDL-FPGA-Verilog] gh_uart_16550_072108

Description: UART（通用串行收发器）的VHDL源代码，适合硬件工程师在FPGA内部实现多个UART-UART (universal serial transceivers), VHDL source code for hardware engineers in the FPGA to achieve multiple internal UART
Platform: | Size: 16384 | Author: 彭涛 | Hits:

[VHDL-FPGA-Verilog] uart

Description: VHDL CODE FOR UART IN DEEP MODIFIED
Platform: | Size: 290816 | Author: ranveer | Hits:

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[VHDL-FPGA-Verilog] conv_code

[Com Port] uart_VHDL

[VHDL-FPGA-Verilog] u-uart

[VHDL-FPGA-Verilog] usingVHDLtoimplementUART

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UART232

[VHDL-FPGA-Verilog] 8051-vhdl-code

[Com Port] uart

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] uart

[SCM] uart

[VHDL-FPGA-Verilog] uart(Verilog)

[VHDL-FPGA-Verilog] UART

[Com Port] UART

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] URAT_VHDL_CODE

[VHDL-FPGA-Verilog] uart

[Other] uart

[VHDL-FPGA-Verilog] gh_uart_16550_072108

[VHDL-FPGA-Verilog] uart

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